Metal-oxide semiconductor field effect transistors (MOSFETs) may be scaled-down (i.e. reduced in size) in order to improve transistor properties and integration. For next-generation transistors, it may be essential to effectively suppress short channel effects in order to achieve channel lengths below 50 nm. In recent years, many approaches to reduce gate electrode length down to 20˜30 nm have been researched and studied. However, due to the short channel length between the source region and the drain region, efforts to suppress short channel effects have been rather unsuccessful thus far.
As such, it may be difficult to achieve stable performance with conventional (flat type) transistors as transistor size is decreased. Research has shown that double-gate field effect transistors may be good substitutes for conventional flat type transistors. Double-gate field effect transistors have gates positioned on both sides of a thin channel, so that the channel voltage may be more effectively controlled.
A fin field effect transistor (FinFET), which is a type of double-gate field effect transistor, is described by Huang et al. in “Sub 50-nm FinFET: PMOS”, 1999 IEEE International Electron Device Meeting Technical Digest.
As disclosed above, a FinFET may include a fin on a SOI (silicon on insulator) substrate that serves as a channel. A source and a drain may be formed on opposite ends of the fin, and a gate therebetween may separate the source and the drain. The FinFET may be used with and/or substituted for conventional flat type transistors.
Channel doping may be necessary for the application of FinFETs for use in dynamic memory (DRAM), which can require refreshing. Doping of the fin with impurities may result in increased threshold voltage but also may result in decreased subthreshold swing, which may improve transistor on/off characteristics. On the other hand, non-homogeneous doping of the fin may reduce subthreshold swing properties but may also reduce threshold voltage, which may reduce the ratio of on-current to off-current such that on/off performance of the memory device is also degraded. If channel doping is not performed at all, the threshold voltage may be reduced. With either alternative (i.e. where no channel doping or non-homogenous doping is used), threshold voltage variation and off-state leakage current may be increased. As such, FinFET performance may be degraded.